Busbar Differential Protection (ANSI 87B): High-Impedance vs Distributed Numerical Architecture

Design comparison between dedicated high-impedance busbar differential schemes with external stabilizing resistors and modern distributed numerical low-impedanc

1. The Criticality of Substation Busbar Clearing

A short circuit on a substation busbar results in the highest possible prospective fault current (Ik'' up to 40 - 63 kA), as all incoming transmission lines and generation feeders contribute simultaneously into the bus. Protection clearing times must be ultra-fast (< 15 - 25 ms) to prevent switchgear structural destruction and catastrophic system blackout. However, false tripping on an external feeder fault must be unconditionally avoided.

2. High-Impedance vs. Numerical Distributed Low-Impedance

Design ParameterHigh-Impedance Differential (87B)Distributed Low-Impedance Differential (87B)
CT RequirementsAll CTs must have identical ratio, low secondary resistance, high knee-point VkAccommodates different CT ratios, standard protection cores (5P20, TPX/TPY)
Secondary WiringDirect parallel copper cross-connections to central panelDedicated Bay Units (BU) digitize currents; fiber-optic links to Central Unit (CU)
CT Saturation SecurityExternal series stabilizing resistor (Rstab) and Metrosil varistorSophisticated numerical saturation detectors (directional phase comparison, wavelet)
Busbar ConfigurationComplex auxiliary switch contacts for bus zone switchingSoftware dynamic zone allocation based on disconnector auxiliary contacts
Breaker Failure (50BF)Requires separate external relays and trip relaysFully integrated 50BF with auto-retrip and zone backup tripping

The stabilizing voltage calculation for high-impedance protection is:

Vstab = If,max · (Ns) / (Np) · (Rct + 2 · Rlead) [Volts]

Where:

  • If,max is the maximum external through-fault current.
  • Rct is the secondary winding resistance of the current transformer.
  • Rlead is the one-way loop lead resistance from the CT terminal box to the relay panel.
  • The required external stabilizing resistor is: Rstab = (Vstab) / (Iset) - Rrelay.

3. Voltage Clamping with Metrosil Non-Linear Resistors

During an internal busbar fault, all saturated CTs feed full current into the high-impedance differential circuit, which would produce destructive kilovolt-level peak voltages (Vpeak > 5 - 10 kV) across the relay terminals and wiring. A non-linear silicon-carbide Metrosil varistor is wired in parallel across the differential circuit to clamp instantaneous voltage spikes safely below 1500 - 2000 V peak without diverting operating current during pickup.

4. Protection Engineering Recommendations

  • For simple single-busbar industrial substations, high-impedance differential remains exceptionally secure, cost-effective, and mathematically transparent.
  • For complex double-busbar, 1.5-breaker, or ring-bus utility transmission substations (110 kV to 400 kV), specify distributed numerical low-impedance systems per IEC 60255-187-1 to eliminate heavy copper cabling and disconnector switching contact hazards.
  • Integrate Breaker Failure Protection (ANSI 50BF) with 100 - 150 ms timer coordinated with breaker mechanism clearing time.
  • Supervise CT secondary wiring continuously with sensitive current-unbalance alarms (ANSI 60) to detect open CT circuits before false tripping occurs.

*Reference: IEC 60255-187-1:2021; IEEE C37.234-2020; CIGRE Technical Brochure 824.*