Medium-Voltage Cables and Busways: Ampacity, Voltage Drop and Short-Circuit Selection
A coordinated feeder guide for IEC 60502-2 MV cables and IEC 61439-6 busways covering ampacity, installation derating, voltage drop, thermal short-circuit and a
1. Cable and Busway Are System Decisions
IEC 60502-2 covers extruded-insulation power cables and accessories from 6 kV to 30 kV (Um 36 kV), while IEC 61439-6 covers low-voltage busbar trunking systems up to 1,000 V AC or 1,500 V DC. The choice depends on route, current, fault duty, installation, maintenance, EMC, fire behaviour and future tapping-not only conductor cross-section.
2. First-Pass Feeder Calculations
For a three-phase feeder:
For a simplified balanced cable voltage drop:
| Check | MV cable | LV busway |
|---|---|---|
| Continuous current | Soil/air thermal model, grouping, screen bonding | Rated current, ambient and grouped trunking derating |
| Short circuit | Conductor, screen and sheath thermal duty | Assembly Icw/Ipk and joint/feeder coordination |
| Installation | Bending radius, water ingress, termination and sheath voltage | Joint torque, tap-off, supports, fire barriers and IP rating |
| Expansion | Spare ducts and parallel circuits | Future tap-off windows and section length |
3. Short-Circuit and Earthing Coordination
The selected conductor must carry the prospective fault for the clearing time. A common adiabatic screen or conductor check is expressed as:
The project must also define zero-sequence path, cable screen bonding, sheath voltage limiters, protective-conductor continuity and the actual relay clearing time.
4. Verification and Handover
- Confirm the exact cable construction, insulation, oversheath, water-blocking claim and accessory compatibility.
- For busways, require design verification under the relevant IEC 61439 part and routine verification of each delivered assembly.
- Record torque, insulation resistance, VLF or withstand tests where applicable, phase sequence, thermography and protective settings.
- Keep the installed route, parallel circuits and derating assumptions in the as-built dossier.
*Reference: IEC 60502-2:2014+A1:2024; IEC 61439-1:2020; IEC 61439-6:2012.*
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