# Transformer Differential Protection (ANSI 87T): Biased Slope, Inrush Restraint, and CT Saturation

> Dual-slope percentage restraint differential protection, 2nd harmonic magnetizing inrush restraint (I_2nd > 15%), 5th harmonic overexcitation blocking, and CT knee-point voltage (Vk) calculation per IEC 61869-2 / IEEE C57.13.

- **Category:** Protection Relays & ANSI 87T
- **Author:** Voltformer Relay Protection & Automation Engineering
- **Publication Date:** 2026-08-25
- **Reading Time:** 9 min read
- **Key Tags:** #Differential Protection, #ANSI 87T, #Inrush Restraint, #CT Sizing, #IEC 60255-187-1
- **Canonical URL:** https://voltformer.com/articles/transformer-differential-protection-87t-inrush-restraint-and-ct-sizing
- **Markdown Source:** https://voltformer.com/articles/transformer-differential-protection-87t-inrush-restraint-and-ct-sizing.md

### 1. Transformer Differential Protection (ANSI 87T) Principles

Per **IEC 60255-187-1**, percentage biased differential protection (ANSI 87T) serves as the primary unit protection for power transformers against internal short circuits.

### 2. Dual-Slope Operating Characteristic Equations

$$ I_{diff} = |\vec{I}_{HV} + \vec{I}_{LV\_referred}| $$
$$ I_{bias} = \frac{|\vec{I}_{HV}| + |\vec{I}_{LV\_referred}|}{2} $$

#### Trip Regions:
- **Slope 1 ($K_1 = 20\% - 30\%$):** Sensitive tripping for internal turn-to-turn and low-current ground faults during normal load.
- **Slope 2 ($K_2 = 60\% - 80\%$):** High restraint preventing false tripping during severe through-faults with CT saturation.

### 3. Harmonic Inrush & Overexcitation Restraint

| Harmonic Component | Threshold Ratio | Relay Action | Physical Root Cause |
|---|---|---|---|
| **2nd Harmonic ($100\text{ Hz}$)** | **$I_{2nd} / I_{fundamental} > 15\%$** | **Block Differential Trip** | Magnetizing inrush current during energization |
| **5th Harmonic ($250\text{ Hz}$)** | **$I_{5th} / I_{fundamental} > 35\%$** | **Block / Alarm** | Core overexcitation from system overvoltage |

### 4. Current Transformer (CT) Knee-Point Voltage ($V_k$) Sizing

To prevent CT saturation during maximum external through-fault current ($I_{f\_max}$):

$$ V_k \ge 2 \cdot I_{sec\_max} \cdot (R_{ct} + 2 \cdot R_{lead} + R_{relay}) $$

Where $R_{ct}$ is CT secondary winding resistance and $R_{lead}$ is one-way lead wire resistance.

*Reference: IEC 60255-187-1:2021; IEC 61869-2:2012; IEEE Std C37.91-2021.*

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